#AMD refreshed the "AMD64 Architecture Programmer's Manual, Volumes 2" 24593 pdf to v3.44
docs.amd.com/v/u/en-US/24...
07.03.2026 09:27
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#AMD refreshed the "AMD64 Architecture Programmer's Manual, Volumes 2" 24593 pdf to v3.44
docs.amd.com/v/u/en-US/24...
#AMD has updated the "Seamless Firmware Maintenance (SFS) Specification" pdf 58604 to v0.76:
docs.amd.com/v/u/en-US/58...
New #Intel #TDX docs:
Intel TDX Module Extension for Quoting
cdrdv2.intel.com/v1/dl/getCon...
What CCD is used in #AMD #Sorano #EPYC8005? 84 cores is quite a strange number, 12*7?
www.amd.com/en/blogs/202...
#AMD released the "CPU Timing and Power Side Channel Guidance" pdf 71030 v1.1:
docs.amd.com/v/u/en-US/71...
#AMD released the 7th #Zen6 pdf "Guest PMC Event Filtering" 69202 v1.00:
docs.amd.com/v/u/en-US/69...
CPUID Fn8000_000A_ECX[GuestPmcFiltering], bit 3
#Virtualization
#Intel SDE 10.7 Release Notes:
www.intel.com/content/www/...
#Intel refreshed the #AVX10_2 specification to 6.0:
cdrdv2-public.intel.com/913918/36105...
#AVX10_VNNI_INT renamed to #AVX10_V1_AUX
#Intel refreshed the Advanced Performance Extensions (#Intel #APX) Architecture Specification to 8.0:
cdrdv2-public.intel.com/913917/35582...
#AMD released the 6th #Zen6 pdf "CPPC Performance Priority" 69206 v1.00:
docs.amd.com/v/u/en-US/69...
#CPPC
#Intel released the SDE 10.7 (Software Development Emulator) with Indirect Branch History Fence ( #IBHF) instruction support and refreshed CPUID dumps:
www.intel.com/content/www/...
#NovaLake #DiamondRapids #APX #AVX10_2
#AMD released the 5th #Zen6 pdf "RMPOPT" 69203 v1.00:
docs.amd.com/v/u/en-US/69...
#RMPOPT #Virtualization
#AMD released the 4th #Zen6 pdf "RMP Dirty" 69203 v1.00:
docs.amd.com/v/u/en-US/69...
#RMPCHKD #Virtualization
#AMD has removed the public access to the #Zen6 "Performance Monitoring Counters for AMD Family 1Ah Model 50h-57h Processors" pdf.
Perhaps a new version reveals too much detail.
Bugzilla has archived v1.00:
bugzilla.kernel.org/attachment.c...
#AMD has re-released PDFs 69191 and 69192, removing the "AMD Confidential" headers.
#AVX512_BMM specification:
docs.amd.com/v/u/en-US/69...
#FRED specification:
docs.amd.com/v/u/en-US/69...
This snow report was the inspiration for this #AMD #Zen codename table. Sources included.
#Zen2 #Zen3 #Zen4 #Zen5 #Zen6 #Zen7
There are a few working #WildCatLake among #Intel test machines: (CPUID D06D1, 6c/6t (2P+4LPE probably), 2500 MHz base freq, no HTT, no AVX512, I think Intel 18A)
intel-gfx-ci.01.org/tree/intel-x...
#CougarCove #Darkmont
According to this LLVM patch, #AMD CPUID BD0F00 is #Annapurna, a #Zen5 based #EPYC Embedded for Network Control Planes:
github.com/llvm/llvm-pr...
#Intel #Xeon600 Processors for Workstation (GNR-W) - Turbo Tables:
www.intel.com/content/www/...
#GraniteRapidsW #GNRW
#Intel microcode refresh 20260211:
github.com/intel/Intel-...
CSV:
github.com/intel/Intel-...
#Intel released the 90th edition of the Software Developer’s Manuals with canonized #FRED, #ArchitecturalPEBS, Asymmetric RDT-M & RDT-A
All-in-One:
cdrdv2-public.intel.com/874240/32546...
Changes v82:
cdrdv2-public.intel.com/874239/25204...
#LKGS, #PBNDKB
Github:
github.com/InstLatx64/I...
Sources:
[1]: x.com/x86deadandba...
[2]: www.youtube.com/watch?v=bO5g...
2/2
New CPUID dump:
-- 128-Core #AMD #EPYC 9754 ( #Bergamo top-SKU, #Zen4c) AA0F02
New Intel codenames:
- #Dunlow (LGA1954 entry server [1])
- #TitanLake, #HammerLake [2]
- LGA1954 socket info #NovaLake, #RazorLake [2]
#AMD #Venice info:
- B50F00, B90F00 = Dense
- BA0F00, BC0F00 = Classic
1/2
Has anyone come across the pin number of the #AMD #SP8 socket? Maybe e.g. a cooler or motherboard manufacturer has already posted it somewhere...
SDE 10.5.0 (Software Development Emulator) Release Notes:
Fortunately, all 11 #Intel #GraniteRapidsW SKUs use dual FMA:
www.intel.com/content/www/...
Official #Intel #GraniteRapidsW SKU list:
www.intel.com/content/www/...
#GNR_W #AVX512 #AVX10_1 #AMX_FP16
#Intel released the SDE 10.5.0 (Software Development Emulator), sync with 60th ISA Ext Guide:
www.intel.com/content/www/...
#NovaLake #DiamondRapids #APX #AVX10_2
CC:
@geofflangdale.bsky.social
One possible application of the #AVX512_BMM VPMACOR16x16x16 instruction is the compact index2msk function: if src2 is a full mask and src3 contains variably shifted masks, then VPMACOR16x16x16 will collect them into a single word. The order and repetitions are arbitrary.