Tim 'mithro' Ansell 's Avatar

Tim 'mithro' Ansell

@mith.ro

Open silicon professional, FPGAs, ASICs, & more! me@mith.ro https://bit.ly/mithro-resume https://linkedin.com/in/mithro

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08.11.2024
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Latest posts by Tim 'mithro' Ansell @mith.ro

Hey @chrisgammell.bsky.social , I've just caught up on your excellent chat with Tim Ansell @mith.ro in The Amp Hour ep #703.
Have you scheduled and executed the 2 hours on the weekend to start your own chip-making journey yet?
A remake of the much loved and rare 6580/6581 SID chip perhaps?

29.10.2025 23:29 πŸ‘ 2 πŸ” 1 πŸ’¬ 1 πŸ“Œ 0
Image of the Fomu iCE40 FPGA development board from KiCad PCB viewer.

Image of the Fomu iCE40 FPGA development board from KiCad PCB viewer.

**Interesting SPI Routing with iCE40 FPGAs**

I wrote about iCE40 FPGAs, and why the way an FPGA is configured can lead to interesting board design decisions. @mith.ro's Fomu is a useful study due to eschewing a USB-Serial chip for accessing the FPGA and SPI flash.

danielmangum.com/posts/spi-ro...

07.11.2025 12:34 πŸ‘ 7 πŸ” 1 πŸ’¬ 0 πŸ“Œ 1
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GitHub - regymm/pcie_7x: PCIe Endpoint on Xilinx 7-Series FPGAs with the PCIE_2_1 hard block and GTP transceivers PCIe Endpoint on Xilinx 7-Series FPGAs with the PCIE_2_1 hard block and GTP transceivers - regymm/pcie_7x

Anyone used github.com/regymm/pcie_7x or know any more information about it?

Has anyone used this with LitePCIe?

13.10.2025 12:21 πŸ‘ 1 πŸ” 0 πŸ’¬ 0 πŸ“Œ 0
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I wrote a custom network stack in C to run on my custom silicon RISC-V core, supporting both IPv4 and IPv6 and its now good enough to make HTTP requests. But maybe I'll turn that around and have it accept HTTP requests. We'll see.
feat. a really ugly bodge to prevent over-current on the memory bus

04.10.2025 23:34 πŸ‘ 7 πŸ” 1 πŸ’¬ 0 πŸ“Œ 0
wafer.space - Budget silicon manufacturing. Create integrated circuits without breaking the bank!

I really want
@mith.ro 's wafer.space silicon manufacturing shuttles to succeed and continue to be available, so I was trying to brainstorm some retro-computer/console chips which may be viable.
Most can be done on FPGA today, but custom silicon could make assembly cheaper (reducing FPGA support).

06.10.2025 00:26 πŸ‘ 6 πŸ” 1 πŸ’¬ 1 πŸ“Œ 0
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Live now! Join @crowdsupply.bsky.social @helenleigh.bsky.social for a conversation with Tim Ansell (@mith.ro) about @wafer.space, a new way for chip designers to easily turn a design into real, working chips: www.youtube.com/watch?v=tEOm...
#OpenHardware #OSHW #OpenSilicon #OpenPDK

02.10.2025 19:30 πŸ‘ 10 πŸ” 3 πŸ’¬ 0 πŸ“Œ 0
Teardown Session 56: wafer.space with Tim Ansell & Leo Moser
Teardown Session 56: wafer.space with Tim Ansell & Leo Moser YouTube video by Crowd Supply

5m until we are live @ www.youtube.com/watch?v=tEOm...

02.10.2025 18:56 πŸ‘ 2 πŸ” 1 πŸ’¬ 0 πŸ“Œ 0

This live stream starts in a few hours!

02.10.2025 14:21 πŸ‘ 1 πŸ” 1 πŸ’¬ 0 πŸ“Œ 0
Preview
495 TinyQV 'Asteroids' - Crowdsourced Risc-V SoC - Tiny Tapeout A Risc-V SoC with peripherals from the Tiny Tapeout Risc-V challenge, codename 'Asteroids'

It was the first time we enabled 4 tile high designs, enabling a monster crowd sourced RISC-V microcontroller competition called Asteroid. At 60k standard cells, this is the biggest design so far on Tiny Tapeout.

tinytapeout.com/chips/ttsky2...

01.10.2025 15:14 πŸ‘ 2 πŸ” 2 πŸ’¬ 1 πŸ“Œ 0
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524 Analog VGA CSDAC experiments - Tiny Tapeout Current switching matrix DAC implementations for analog VGA displays

And finally here’s a cool current steering DAC that’s designed to drive a VGA monitor by Anton - good to see your mixed signal skills evolving Anton!

tinytapeout.com/chips/ttsky2...

01.10.2025 15:14 πŸ‘ 1 πŸ” 1 πŸ’¬ 1 πŸ“Œ 0
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454 Single Port OpenRAM Testchip - Tiny Tapeout Testchip of single port SRAM macro using two phase clocking

It’s great to see people using our service to test bigger mixed signal designs like OpenRAM. In this test, Jesse put a tiny 16x32 RAM inside a 4 tile digital design.

tinytapeout.com/chips/ttsky2...

01.10.2025 15:14 πŸ‘ 2 πŸ” 3 πŸ’¬ 1 πŸ“Œ 0
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871 Cross stitch Creatures #2 - Tiny Tapeout generative pattern creatures using silicon cross stitch

We have our first commissioned art from @bleeptrack.de , β€œCross Stitch Creatures” - the first of 4 in a series exploring silicon art.

tinytapeout.com/chips/ttsky2...

01.10.2025 15:14 πŸ‘ 4 πŸ” 2 πŸ’¬ 1 πŸ“Œ 1
Preview
462 TV-B-Gone-EU (ROM Macro variant) - Tiny Tapeout TV-B-Gone shuts down many TVs by sending IR codes

Mitch Altman has long inspired us, and as a tribute we included an ASIC version of his classic TV-B-Gone universal off button for TVs. We also took the opportunity to test Sylvain Munalt’s ROM.

tinytapeout.com/chips/ttsky2...

01.10.2025 15:14 πŸ‘ 2 πŸ” 2 πŸ’¬ 1 πŸ“Œ 0
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490 mini mosbius - Tiny Tapeout a mosbius style chip in a 3x2 tt slot

Inspired by Peter Kinget, we commissioned Andrew Kang to create a Mini MOSBius especially for us. The idea is to enable analog designers to get faster feedback on their circuit designs with an analog FPGA.

tinytapeout.com/chips/ttsky2...

01.10.2025 15:14 πŸ‘ 4 πŸ” 3 πŸ’¬ 1 πŸ“Œ 0
floorplan of the latest TT ASIC multi project chip

floorplan of the latest TT ASIC multi project chip

We just packed 237 of your projects into our most packed ASIC to date and submitted it for manufacture. Let’s take a look inside…

01.10.2025 15:12 πŸ‘ 25 πŸ” 8 πŸ’¬ 1 πŸ“Œ 0

Send me an email to me@mith.ro and we can see if we can make something work!

30.09.2025 06:05 πŸ‘ 1 πŸ” 0 πŸ’¬ 0 πŸ“Œ 0

Guess it is time to finally finish the USB-C Fomu version :-)

30.09.2025 06:03 πŸ‘ 0 πŸ” 0 πŸ’¬ 0 πŸ“Œ 0
#703 – Building wafer.space with Tim Ansell | The Amp Hour Electronics Podcast Tim 'Mithro' Ansell returns to The Amp Hour to discuss his new Singapore based wafer sharing service called wafer.space. Now that Efabless is no more, this venture will aim to make silicon even more a...

@mith.ro is on the current episode of The Amp Hour, for another general-access chip manufacturing option. Give the podcast a listen, and think about the possibilities of making your own small-run chips !

theamphour.com/703-building...

27.09.2025 03:24 πŸ‘ 3 πŸ” 1 πŸ’¬ 0 πŸ“Œ 0
Teardown Session 56: wafer.space with Tim Ansell
Teardown Session 56: wafer.space with Tim Ansell YouTube video by Crowd Supply

Leo Moser and myself will be on @crowdsupply.bsky.social 's Teardown Session talking with @helenleigh.bsky.social about
@wafer.space this Thursday (3rd October) - youtu.be/tEOmnN8IAjs

30.09.2025 06:00 πŸ‘ 12 πŸ” 6 πŸ’¬ 1 πŸ“Œ 0
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What happens when one of the main providers that enables #opensource #silicon to thrive...shuts down? Companies like @mith.ro's new wafer.space jump in and offer an even more compelling option. $7K for 1000 chips on the GlobalFoundries GF180MCU process. Learn more:

theamphour.com/703-building...

25.09.2025 18:19 πŸ‘ 28 πŸ” 8 πŸ’¬ 0 πŸ“Œ 2

100% legit. @nextpcb.bsky.social are wonderful supporters of the KiCad project and we will be making a blog post about this new OSHW site soon

25.09.2025 14:02 πŸ‘ 17 πŸ” 1 πŸ’¬ 1 πŸ“Œ 0

Did you say that has an iCE40 on it?

26.09.2025 01:08 πŸ‘ 1 πŸ” 0 πŸ’¬ 1 πŸ“Œ 0
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Well, it blinks.

The whole you have to unplug it from your computer and plug it into an SD card slot that doesn’t act as an SD host to run the design thing may get old rather quickly.

25.09.2025 19:14 πŸ‘ 5 πŸ” 1 πŸ’¬ 1 πŸ“Œ 0
wafer.space - Budget silicon manufacturing. Create integrated circuits without breaking the bank!

My company wafer.space is but I am not. I will be visiting Singapore on 7th -> 10th Oct.

26.09.2025 01:01 πŸ‘ 1 πŸ” 0 πŸ’¬ 1 πŸ“Œ 0

@mith.ro was interviewed by @chrisgammell.bsky.social about the @wafer.space service!

Find out more at wafer.space!

25.09.2025 21:25 πŸ‘ 6 πŸ” 4 πŸ’¬ 0 πŸ“Œ 1

It was awesome to be on @chrisgammell.bsky.social 's Amp Hour podcast again. Find out more about my latest endeavor to make custom silicon manufacturing accessible and follow @wafer.space and bookmark wafer.space to keep up to date!

25.09.2025 21:22 πŸ‘ 5 πŸ” 3 πŸ’¬ 1 πŸ“Œ 0

Depends on the demand. I would like to get to once a month but once a quarter will probably be the initial frequency.

11.09.2025 16:28 πŸ‘ 3 πŸ” 1 πŸ’¬ 0 πŸ“Œ 0
TinyTapeout IHP 0.1 - Silicon Bringup time
TinyTapeout IHP 0.1 - Silicon Bringup time YouTube video by Sylvain Munaut

Want to watch a live bringup of @tinytapeout.com 's first test chip with IHP?

I'm cancelling my #open #source #silicon #stream and leaving the stage for Sylvain Munaut!

He starts streaming shortly here: www.youtube.com/watch?v=indh...

24.03.2025 14:55 πŸ‘ 10 πŸ” 3 πŸ’¬ 0 πŸ“Œ 0
A screenshot of the top bar of the Okular PDF reader showing 13 open PDFs, the first ones are PCIe 1.1/2.1/3/4/5/6/6.2/6.4/7 then one is the PCIe 1.1 errata and the last few are variants on the PIPE spec

A screenshot of the top bar of the Okular PDF reader showing 13 open PDFs, the first ones are PCIe 1.1/2.1/3/4/5/6/6.2/6.4/7 then one is the PCIe 1.1 errata and the last few are variants on the PIPE spec

"Which PCIe Specifications do you have open right now?"

Yes.

10.09.2025 17:15 πŸ‘ 9 πŸ” 2 πŸ’¬ 0 πŸ“Œ 0
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Low power math within few clock cycles.

Imagine it, then put it into silicon.

Made by Vicharak aka @aksharvastarpara.bsky.social 's team and two FPGA freaks.

Check - t.co/vBGGA2i0uX

Thanks @mattvenn.net and @urishaked.bsky.social and whole @tinytapeout.com team for making this possible.

06.09.2025 08:18 πŸ‘ 13 πŸ” 5 πŸ’¬ 1 πŸ“Œ 1